It is known to use silicon nitride films in the manufacture of semiconductor devices, such as insulated gate field effect transistors, i.e. IGFETs. Silicon nitride films are etch-resistant to silicon oxide etchants and are oxidation-resistant. They are used as etch masks, oxidation masks, passivating coatings and simply protective coatings. It is even known to form silicon nitride in situ by exposure of a silicon surface to ammonia, and to use a technique in semiconductive device manufacture. Self-alignment is a desirable feature in a semiconductor method because it eliminates a critical masking step. Self-alignment thus permits closer feature spacing and/or smaller geometries to be used. Accordingly, denser integrated circuits can be made.
Ion beam milling is sputter etching technique that is of increasing interest in manufacturing dense IGFET integrated circuits. It offers extreme etching precision. It is also known that ion beam milling will concurrently shallowly implant ions into the surface being etched. I have found that if nitrogen ions are used in ion beam milling silicon for a sufficient duration, and if the silicon is properly annealed, an extremely thin but very useful film of silicon nitride will be formed on the silicon surface. Even though the film is quite thin, e.g. about 100 angstroms or less, when properly annealed it is so etch-resistant and oxidation-resistant that it is quite useful in semiconductor device processing. Proper anneal means heat treatment in a nonoxidizing atmosphere, such as nitrogen, before heat treatment in any oxidizing atmosphere. This type of anneal can readily be done as a preliminary phase of any subsequent oxidizing heat treatment normally used in the manufacture of a semiconductor device.
I have found that I can incorporate nitrogen ion beam milling and my distinctive anneal at various stages of integrated circuit fabrication, to permit the nitrogen ion beam milling to perform functions in addition to milling. For example, it can form an etch stop and/or an oxidation mask, depending on how it is integrated in the fabrication process.
Still further, I have found how to integrate ion beam milling and the distinctive nonoxidizing anneal atmosphere without adding any significant steps to the fabrication process. In fact, by integrating this technique in the wafer fabrication the number of steps, even critical masking steps, can be reduced. For example, a separate silicon nitride deposition process is not needed. Self-alignment of the silicon nitride produced features is obtained, which reduces critical masking steps. In this latter connection, self-aligned contact windows can be produced. Further, I have found that I can now readily reflow a phosphosilicate glass overcoat on the surface of a monolithic integrated circuit after etching a contact window in the glass, without concurrently reforming thermal oxide in the window. Thus, a critical remasking step to remove it is not needed. I can even use these concepts to reduce electrical shorts between the gate electrode and source or drain electrodes, as will hereinafter become more apparent.